Update to go1.24.0
This commit is contained in:
Vorapol Rinsatitnon
227
src/runtime/export_debug_loong64_test.go
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227
src/runtime/export_debug_loong64_test.go
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// Copyright 2024 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//go:build loong64 && linux
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package runtime
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import (
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"internal/abi"
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"internal/goarch"
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"unsafe"
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)
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type sigContext struct {
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savedRegs sigcontext
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}
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func sigctxtSetContextRegister(ctxt *sigctxt, x uint64) {
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ctxt.regs().sc_regs[29] = x
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}
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func sigctxtAtTrapInstruction(ctxt *sigctxt) bool {
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return *(*uint32)(unsafe.Pointer(ctxt.sigpc())) == 0x002a0000 // BREAK 0
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}
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func sigctxtStatus(ctxt *sigctxt) uint64 {
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return ctxt.r19()
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}
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func (h *debugCallHandler) saveSigContext(ctxt *sigctxt) {
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sp := ctxt.sp()
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sp -= goarch.PtrSize
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ctxt.set_sp(sp)
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*(*uint64)(unsafe.Pointer(uintptr(sp))) = ctxt.link() // save the current lr
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ctxt.set_link(ctxt.pc()) // set new lr to the current pc
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// Write the argument frame size.
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*(*uintptr)(unsafe.Pointer(uintptr(sp - 8))) = h.argSize
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// Save current registers.
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h.sigCtxt.savedRegs = *ctxt.regs()
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}
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// case 0
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func (h *debugCallHandler) debugCallRun(ctxt *sigctxt) {
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sp := ctxt.sp()
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memmove(unsafe.Pointer(uintptr(sp)+8), h.argp, h.argSize)
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if h.regArgs != nil {
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storeRegArgs(ctxt.regs(), h.regArgs)
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}
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// Push return PC, which should be the signal PC+4, because
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// the signal PC is the PC of the trap instruction itself.
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ctxt.set_link(ctxt.pc() + 4)
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// Set PC to call and context register.
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ctxt.set_pc(uint64(h.fv.fn))
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sigctxtSetContextRegister(ctxt, uint64(uintptr(unsafe.Pointer(h.fv))))
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}
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// case 1
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func (h *debugCallHandler) debugCallReturn(ctxt *sigctxt) {
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sp := ctxt.sp()
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memmove(h.argp, unsafe.Pointer(uintptr(sp)+8), h.argSize)
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if h.regArgs != nil {
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loadRegArgs(h.regArgs, ctxt.regs())
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}
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// Restore the old lr from *sp
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olr := *(*uint64)(unsafe.Pointer(uintptr(sp)))
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ctxt.set_link(olr)
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pc := ctxt.pc()
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ctxt.set_pc(pc + 4) // step to next instruction
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}
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// case 2
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func (h *debugCallHandler) debugCallPanicOut(ctxt *sigctxt) {
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sp := ctxt.sp()
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memmove(unsafe.Pointer(&h.panic), unsafe.Pointer(uintptr(sp)+8), 2*goarch.PtrSize)
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ctxt.set_pc(ctxt.pc() + 4)
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}
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// case 8
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func (h *debugCallHandler) debugCallUnsafe(ctxt *sigctxt) {
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sp := ctxt.sp()
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reason := *(*string)(unsafe.Pointer(uintptr(sp) + 8))
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h.err = plainError(reason)
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ctxt.set_pc(ctxt.pc() + 4)
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}
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// case 16
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func (h *debugCallHandler) restoreSigContext(ctxt *sigctxt) {
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// Restore all registers except for pc and sp
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pc, sp := ctxt.pc(), ctxt.sp()
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*ctxt.regs() = h.sigCtxt.savedRegs
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ctxt.set_pc(pc + 4)
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ctxt.set_sp(sp)
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}
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func getVal32(base uintptr, off uintptr) uint32 {
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return *(*uint32)(unsafe.Pointer(base + off))
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}
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func getVal64(base uintptr, off uintptr) uint64 {
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return *(*uint64)(unsafe.Pointer(base + off))
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}
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func setVal64(base uintptr, off uintptr, val uint64) {
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*(*uint64)(unsafe.Pointer(base + off)) = val
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}
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// Layout for sigcontext on linux/loong64: arch/loongarch/include/uapi/asm/sigcontext.h
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//
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// sc_extcontext | sctx_info
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// ------------------------------------------
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// | {fpu,lsx,lasx}_context
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// ---------------------------
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// | sctx_info
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// ---------------------------
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// | lbt_context
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//
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const (
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INVALID_MAGIC uint32 = 0
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FPU_CTX_MAGIC = 0x46505501
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LSX_CTX_MAGIC = 0x53580001
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LASX_CTX_MAGIC = 0x41535801
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LBT_CTX_MAGIC = 0x42540001
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)
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const (
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SCTX_INFO_SIZE = 4 + 4 + 8
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FPU_CTX_SIZE = 8*32 + 8 + 4 // fpu context size
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LSX_CTX_SIZE = 8*64 + 8 + 4 // lsx context size
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LASX_CTX_SIZE = 8*128 + 8 + 4 // lasx context size
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LBT_CTX_SIZE = 8*4 + 4 + 4 // lbt context size
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)
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// storeRegArgs sets up argument registers in the signal context state
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// from an abi.RegArgs.
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//
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// Both src and dst must be non-nil.
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func storeRegArgs(dst *sigcontext, src *abi.RegArgs) {
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// R4..R19 are used to pass int arguments in registers on loong64
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for i := 0; i < abi.IntArgRegs; i++ {
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dst.sc_regs[i+4] = (uint64)(src.Ints[i])
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}
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// F0..F15 are used to pass float arguments in registers on loong64
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offset := (uintptr)(0)
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baseAddr := (uintptr)(unsafe.Pointer(&dst.sc_extcontext))
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for {
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magic := getVal32(baseAddr, offset)
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size := getVal32(baseAddr, offset+4)
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switch magic {
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case INVALID_MAGIC:
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return
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case FPU_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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setVal64(baseAddr, ((uintptr)(i*8) + offset), src.Floats[i])
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}
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return
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case LSX_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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setVal64(baseAddr, ((uintptr)(i*16) + offset), src.Floats[i])
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}
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return
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case LASX_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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setVal64(baseAddr, ((uintptr)(i*32) + offset), src.Floats[i])
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}
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return
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case LBT_CTX_MAGIC:
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offset += uintptr(size)
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}
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}
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}
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func loadRegArgs(dst *abi.RegArgs, src *sigcontext) {
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// R4..R19 are used to pass int arguments in registers on loong64
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for i := 0; i < abi.IntArgRegs; i++ {
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dst.Ints[i] = uintptr(src.sc_regs[i+4])
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}
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// F0..F15 are used to pass float arguments in registers on loong64
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offset := (uintptr)(0)
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baseAddr := (uintptr)(unsafe.Pointer(&src.sc_extcontext))
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for {
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magic := getVal32(baseAddr, offset)
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size := getVal32(baseAddr, (offset + 4))
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switch magic {
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case INVALID_MAGIC:
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return
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case FPU_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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dst.Floats[i] = getVal64(baseAddr, (uintptr(i*8) + offset))
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}
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return
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case LSX_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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dst.Floats[i] = getVal64(baseAddr, (uintptr(i*16) + offset))
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}
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return
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case LASX_CTX_MAGIC:
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offset += SCTX_INFO_SIZE
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for i := 0; i < abi.FloatArgRegs; i++ {
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dst.Floats[i] = getVal64(baseAddr, (uintptr(i*32) + offset))
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}
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return
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case LBT_CTX_MAGIC:
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offset += uintptr(size)
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}
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}
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}
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