add tinygo device files
This commit is contained in:
Li Jie
126
targets/device/sam/at91sam9cn11.s
Normal file
126
targets/device/sam/at91sam9cn11.s
Normal file
@@ -0,0 +1,126 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9CN11.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
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/*
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// Atmel AT91SAM9CN11 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, Crypto engine, LCD, USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9CN11.aspx for more)
|
||||
*/
|
||||
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||||
|
||||
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.syntax unified
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// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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wfe
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||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
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||||
.macro IRQ handler
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||||
.weak \handler
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||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
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||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
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.section .isr_vector, "a", %progbits
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.global __isr_vector
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||||
__isr_vector:
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||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
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||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
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||||
.long Reset_Handler
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||||
.long NMI_Handler
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||||
.long HardFault_Handler
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||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
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||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long SPI0_IRQHandler
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||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
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||||
.long DMAC_IRQHandler
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||||
.long 0
|
||||
.long 0
|
||||
.long UDP_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
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||||
.long 0
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||||
.long SHA_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long AES_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long IRQ_IRQHandler
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||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ SHA_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ AES_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
126
targets/device/sam/at91sam9cn12.s
Normal file
126
targets/device/sam/at91sam9cn12.s
Normal file
@@ -0,0 +1,126 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9CN12.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
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||||
|
||||
/*
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||||
// Atmel AT91SAM9CN12 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, Secure BootROM, Crypto engine, LCD, USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9CN12.aspx for more)
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||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
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// This is the default handler for interrupts, if triggered but not defined.
|
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.section .text.Default_Handler
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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wfe
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||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
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.section .isr_vector, "a", %progbits
|
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.global __isr_vector
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||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long UDP_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long 0
|
||||
.long SHA_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long AES_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
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||||
IRQ USART2_IRQHandler
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||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ SHA_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ AES_IRQHandler
|
||||
IRQ TRNG_IRQHandler
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||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
123
targets/device/sam/at91sam9g10.s
Normal file
123
targets/device/sam/at91sam9g10.s
Normal file
@@ -0,0 +1,123 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9G10.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9G10 device: ARM926EJ Embedded Microprocessor Unit, 266MHz, LCD, USB, 217 Pins (refer to http://www.atmel.com/devices/SAM9G10.aspx for more)
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||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long MCI_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
.long TWI_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long SSC2_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long UHP_IRQHandler
|
||||
.long LCDC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long IRQ0_IRQHandler
|
||||
.long IRQ1_IRQHandler
|
||||
.long IRQ2_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ MCI_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
IRQ TWI_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ SSC2_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ UHP_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ IRQ0_IRQHandler
|
||||
IRQ IRQ1_IRQHandler
|
||||
IRQ IRQ2_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
125
targets/device/sam/at91sam9g15.s
Normal file
125
targets/device/sam/at91sam9g15.s
Normal file
@@ -0,0 +1,125 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9G15.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9G15 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, LCD, Touchscreen, HS USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9G15.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/at91sam9g20.s
Normal file
129
targets/device/sam/at91sam9g20.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9G20.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9G20 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, USB, Ethernet, 217 and 247 Pins (refer to http://www.atmel.com/devices/SAM9G20.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long MCI_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
.long TWI_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long UHP_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long USART4_IRQHandler
|
||||
.long USART5_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long IRQ0_IRQHandler
|
||||
.long IRQ1_IRQHandler
|
||||
.long IRQ2_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ MCI_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
IRQ TWI_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ UHP_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ USART4_IRQHandler
|
||||
IRQ USART5_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ IRQ0_IRQHandler
|
||||
IRQ IRQ1_IRQHandler
|
||||
IRQ IRQ2_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
127
targets/device/sam/at91sam9g25.s
Normal file
127
targets/device/sam/at91sam9g25.s
Normal file
@@ -0,0 +1,127 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9G25.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9G25 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, Ethernet, HS USB, LPDDR/DDR2/MLC NAND support, 217 and 247 Pins (refer to http://www.atmel.com/devices/SAM9G25.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
126
targets/device/sam/at91sam9g35.s
Normal file
126
targets/device/sam/at91sam9g35.s
Normal file
@@ -0,0 +1,126 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9G35.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9G35 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, LCD, Touchscreen, Ethernet, HS USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9G35.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long LCDC_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/at91sam9m10.s
Normal file
128
targets/device/sam/at91sam9m10.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9M10.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9M10 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, DDR2/LPDDR, Video Decoder, LCD, HS USB, 10/100 Ethernet, Dual EBI, 324 Pins (refer to http://www.atmel.com/devices/SAM9M10.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long TSADCC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long AC97C_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI1_IRQHandler
|
||||
.long VDEC_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ TSADCC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ AC97C_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ VDEC_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
130
targets/device/sam/at91sam9m11.s
Normal file
130
targets/device/sam/at91sam9m11.s
Normal file
@@ -0,0 +1,130 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9M11.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9M11 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, Hardware Encryption, Video Decoder, DDR2/LPDDR, Dual EBI, 324 Pins (refer to http://www.atmel.com/devices/SAM9M11.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DDRSDRC0_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long TSADCC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long AC97C_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
.long AES_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long VDEC_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DDRSDRC0_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ TSADCC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ AC97C_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ AES_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ VDEC_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/at91sam9n12.s
Normal file
124
targets/device/sam/at91sam9n12.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9N12.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9N12 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, LCD, USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9N12.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long UDP_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long 0
|
||||
.long TRNG_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/at91sam9x25.s
Normal file
129
targets/device/sam/at91sam9x25.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9X25.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9X25 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, Dual Ethernet and CAN, HS USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9X25.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long EMAC0_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI1_IRQHandler
|
||||
.long EMAC1_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ EMAC0_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ EMAC1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/at91sam9x35.s
Normal file
128
targets/device/sam/at91sam9x35.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from AT91SAM9X35.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel AT91SAM9X35 device: ARM926EJ Embedded Microprocessor Unit, 400MHz, LCD, Touchscreen, Ethernet, Dual CAN, HS USB, LPDDR/DDR2/MLC NAND support, 217 Pins (refer to http://www.atmel.com/devices/SAM9X35.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long LCDC_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
.long IRQ_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
140
targets/device/sam/atsam3a4c.s
Normal file
140
targets/device/sam/atsam3a4c.s
Normal file
@@ -0,0 +1,140 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3A4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3A4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
140
targets/device/sam/atsam3a8c.s
Normal file
140
targets/device/sam/atsam3a8c.s
Normal file
@@ -0,0 +1,140 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3A8C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3A8C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
115
targets/device/sam/atsam3n00a.s
Normal file
115
targets/device/sam/atsam3n00a.s
Normal file
@@ -0,0 +1,115 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N00A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N00A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
116
targets/device/sam/atsam3n00b.s
Normal file
116
targets/device/sam/atsam3n00b.s
Normal file
@@ -0,0 +1,116 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N00B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N00B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
115
targets/device/sam/atsam3n0a.s
Normal file
115
targets/device/sam/atsam3n0a.s
Normal file
@@ -0,0 +1,115 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N0A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N0A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
116
targets/device/sam/atsam3n0b.s
Normal file
116
targets/device/sam/atsam3n0b.s
Normal file
@@ -0,0 +1,116 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N0B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N0B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3n0c.s
Normal file
120
targets/device/sam/atsam3n0c.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N0C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N0C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
115
targets/device/sam/atsam3n1a.s
Normal file
115
targets/device/sam/atsam3n1a.s
Normal file
@@ -0,0 +1,115 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N1A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N1A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
116
targets/device/sam/atsam3n1b.s
Normal file
116
targets/device/sam/atsam3n1b.s
Normal file
@@ -0,0 +1,116 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N1B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N1B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3n1c.s
Normal file
120
targets/device/sam/atsam3n1c.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N1C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N1C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
115
targets/device/sam/atsam3n2a.s
Normal file
115
targets/device/sam/atsam3n2a.s
Normal file
@@ -0,0 +1,115 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N2A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N2A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
116
targets/device/sam/atsam3n2b.s
Normal file
116
targets/device/sam/atsam3n2b.s
Normal file
@@ -0,0 +1,116 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N2B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N2B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3n2c.s
Normal file
120
targets/device/sam/atsam3n2c.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N2C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N2C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
115
targets/device/sam/atsam3n4a.s
Normal file
115
targets/device/sam/atsam3n4a.s
Normal file
@@ -0,0 +1,115 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N4A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N4A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
116
targets/device/sam/atsam3n4b.s
Normal file
116
targets/device/sam/atsam3n4b.s
Normal file
@@ -0,0 +1,116 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N4B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N4B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3n4c.s
Normal file
120
targets/device/sam/atsam3n4c.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3N4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3N4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long 0
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
122
targets/device/sam/atsam3s1a.s
Normal file
122
targets/device/sam/atsam3s1a.s
Normal file
@@ -0,0 +1,122 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S1A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S1A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam3s1b.s
Normal file
124
targets/device/sam/atsam3s1b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S1B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S1B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam3s1c.s
Normal file
128
targets/device/sam/atsam3s1c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S1C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S1C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
122
targets/device/sam/atsam3s2a.s
Normal file
122
targets/device/sam/atsam3s2a.s
Normal file
@@ -0,0 +1,122 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S2A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S2A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam3s2b.s
Normal file
124
targets/device/sam/atsam3s2b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S2B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S2B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam3s2c.s
Normal file
128
targets/device/sam/atsam3s2c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S2C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S2C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
122
targets/device/sam/atsam3s4a.s
Normal file
122
targets/device/sam/atsam3s4a.s
Normal file
@@ -0,0 +1,122 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S4A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S4A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam3s4b.s
Normal file
124
targets/device/sam/atsam3s4b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S4B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S4B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam3s4c.s
Normal file
128
targets/device/sam/atsam3s4c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam3s8b.s
Normal file
124
targets/device/sam/atsam3s8b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S8B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S8B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/atsam3s8c.s
Normal file
129
targets/device/sam/atsam3s8c.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3S8C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3S8C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam3sd8b.s
Normal file
124
targets/device/sam/atsam3sd8b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3SD8B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3SD8B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/atsam3sd8c.s
Normal file
129
targets/device/sam/atsam3sd8c.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3SD8C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3SD8C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
118
targets/device/sam/atsam3u1c.s
Normal file
118
targets/device/sam/atsam3u1c.s
Normal file
@@ -0,0 +1,118 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U1C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U1C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3u1e.s
Normal file
120
targets/device/sam/atsam3u1e.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U1E.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U1E Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
118
targets/device/sam/atsam3u2c.s
Normal file
118
targets/device/sam/atsam3u2c.s
Normal file
@@ -0,0 +1,118 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U2C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U2C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
120
targets/device/sam/atsam3u2e.s
Normal file
120
targets/device/sam/atsam3u2e.s
Normal file
@@ -0,0 +1,120 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U2E.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U2E Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
119
targets/device/sam/atsam3u4c.s
Normal file
119
targets/device/sam/atsam3u4c.s
Normal file
@@ -0,0 +1,119 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
121
targets/device/sam/atsam3u4e.s
Normal file
121
targets/device/sam/atsam3u4e.s
Normal file
@@ -0,0 +1,121 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3U4E.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3U4E Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC12B_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UDPHS_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC12B_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
141
targets/device/sam/atsam3x4c.s
Normal file
141
targets/device/sam/atsam3x4c.s
Normal file
@@ -0,0 +1,141 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3X4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3X4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
147
targets/device/sam/atsam3x4e.s
Normal file
147
targets/device/sam/atsam3x4e.s
Normal file
@@ -0,0 +1,147 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3X4E.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3X4E Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long TC8_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ TC8_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
141
targets/device/sam/atsam3x8c.s
Normal file
141
targets/device/sam/atsam3x8c.s
Normal file
@@ -0,0 +1,141 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3X8C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3X8C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
147
targets/device/sam/atsam3x8e.s
Normal file
147
targets/device/sam/atsam3x8e.s
Normal file
@@ -0,0 +1,147 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3X8E.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3X8E Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long 0
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long TC8_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ TC8_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
151
targets/device/sam/atsam3x8h.s
Normal file
151
targets/device/sam/atsam3x8h.s
Normal file
@@ -0,0 +1,151 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM3X8H.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM3X8H Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART_IRQHandler
|
||||
.long 0
|
||||
.long SDRAMC_IRQHandler
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long PIOE_IRQHandler
|
||||
.long PIOF_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long TC8_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long UOTGHS_IRQHandler
|
||||
.long TRNG_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART_IRQHandler
|
||||
IRQ SDRAMC_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ PIOE_IRQHandler
|
||||
IRQ PIOF_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ TC8_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ UOTGHS_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam4s16b.s
Normal file
124
targets/device/sam/atsam4s16b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S16B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S16B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4s16c.s
Normal file
128
targets/device/sam/atsam4s16c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S16C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S16C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
121
targets/device/sam/atsam4s2a.s
Normal file
121
targets/device/sam/atsam4s2a.s
Normal file
@@ -0,0 +1,121 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S2A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S2A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam4s2b.s
Normal file
124
targets/device/sam/atsam4s2b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S2B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S2B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4s2c.s
Normal file
128
targets/device/sam/atsam4s2c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S2C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S2C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
121
targets/device/sam/atsam4s4a.s
Normal file
121
targets/device/sam/atsam4s4a.s
Normal file
@@ -0,0 +1,121 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S4A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S4A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long 0
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam4s4b.s
Normal file
124
targets/device/sam/atsam4s4b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S4B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S4B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4s4c.s
Normal file
128
targets/device/sam/atsam4s4c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S4C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S4C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam4s8b.s
Normal file
124
targets/device/sam/atsam4s8b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S8B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S8B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4s8c.s
Normal file
128
targets/device/sam/atsam4s8c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4S8C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4S8C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
124
targets/device/sam/atsam4sa16b.s
Normal file
124
targets/device/sam/atsam4sa16b.s
Normal file
@@ -0,0 +1,124 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SA16B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SA16B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4sa16c.s
Normal file
128
targets/device/sam/atsam4sa16c.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SA16C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SA16C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long 0
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
125
targets/device/sam/atsam4sd16b.s
Normal file
125
targets/device/sam/atsam4sd16b.s
Normal file
@@ -0,0 +1,125 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SD16B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SD16B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/atsam4sd16c.s
Normal file
129
targets/device/sam/atsam4sd16c.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SD16C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SD16C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
125
targets/device/sam/atsam4sd32b.s
Normal file
125
targets/device/sam/atsam4sd32b.s
Normal file
@@ -0,0 +1,125 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SD32B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SD32B Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long 0
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
129
targets/device/sam/atsam4sd32c.s
Normal file
129
targets/device/sam/atsam4sd32c.s
Normal file
@@ -0,0 +1,129 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SD32C.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SD32C Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long HSMCI_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long SPI_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ HSMCI_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ SPI_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
128
targets/device/sam/atsam4sp32a.s
Normal file
128
targets/device/sam/atsam4sp32a.s
Normal file
@@ -0,0 +1,128 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAM4SP32A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAM4SP32A Microcontroller
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PMC_IRQHandler
|
||||
.long EFC0_IRQHandler
|
||||
.long EFC1_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long PPLC_IRQHandler
|
||||
.long SSC_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long TC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DACC_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long CRCCU_IRQHandler
|
||||
.long ACC_IRQHandler
|
||||
.long UDP_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ EFC0_IRQHandler
|
||||
IRQ EFC1_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ PPLC_IRQHandler
|
||||
IRQ SSC_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ TC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DACC_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ CRCCU_IRQHandler
|
||||
IRQ ACC_IRQHandler
|
||||
IRQ UDP_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
154
targets/device/sam/atsama5d31.s
Normal file
154
targets/device/sam/atsama5d31.s
Normal file
@@ -0,0 +1,154 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMA5D31.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAMA5D31 device: ARM Cortex-A5 processor-based embedded MPU, 536MHz, Linux support, FPU, LCD controller, 10/100 Ethernet, security (refer to http://www.atmel.com/devices/SAMA5D31.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long PMC_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long PIOE_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long HSMCI2_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long 0
|
||||
.long EMAC_IRQHandler
|
||||
.long LCDC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ PIOE_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ HSMCI2_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
151
targets/device/sam/atsama5d33.s
Normal file
151
targets/device/sam/atsama5d33.s
Normal file
@@ -0,0 +1,151 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMA5D33.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAMA5D33 device: ARM Cortex-A5 processor-based embedded MPU, 536MHz, Linux support, FPU, LCD controller, gigabit Ethernet, security (refer to http://www.atmel.com/devices/SAMA5D33.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long PMC_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long PIOE_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long 0
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long GMAC_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ PIOE_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ GMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
154
targets/device/sam/atsama5d34.s
Normal file
154
targets/device/sam/atsama5d34.s
Normal file
@@ -0,0 +1,154 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMA5D34.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAMA5D34 device: ARM Cortex-A5 processor-based embedded MPU, 536MHz, Linux support, FPU, LCD controller, gigabit Ethernet, dual CAN, security (refer to http://www.atmel.com/devices/SAMA5D34.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long PMC_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long PIOE_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long HSMCI2_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long GMAC_IRQHandler
|
||||
.long 0
|
||||
.long LCDC_IRQHandler
|
||||
.long ISI_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ PIOE_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ HSMCI2_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ GMAC_IRQHandler
|
||||
IRQ LCDC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
156
targets/device/sam/atsama5d35.s
Normal file
156
targets/device/sam/atsama5d35.s
Normal file
@@ -0,0 +1,156 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMA5D35.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Atmel ATSAMA5D35 device: ARM Cortex-A5 processor-based embedded MPU, 536MHz, Linux support, FPU, dual Ethernet, dual CAN, security (refer to http://www.atmel.com/devices/SAMA5D35.aspx for more)
|
||||
*/
|
||||
|
||||
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long FIQ_IRQHandler
|
||||
.long PMC_IRQHandler
|
||||
.long DBGU_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long PIOA_IRQHandler
|
||||
.long PIOB_IRQHandler
|
||||
.long PIOC_IRQHandler
|
||||
.long PIOD_IRQHandler
|
||||
.long PIOE_IRQHandler
|
||||
.long SMD_IRQHandler
|
||||
.long USART0_IRQHandler
|
||||
.long USART1_IRQHandler
|
||||
.long USART2_IRQHandler
|
||||
.long USART3_IRQHandler
|
||||
.long UART0_IRQHandler
|
||||
.long UART1_IRQHandler
|
||||
.long TWI0_IRQHandler
|
||||
.long TWI1_IRQHandler
|
||||
.long TWI2_IRQHandler
|
||||
.long HSMCI0_IRQHandler
|
||||
.long HSMCI1_IRQHandler
|
||||
.long HSMCI2_IRQHandler
|
||||
.long SPI0_IRQHandler
|
||||
.long SPI1_IRQHandler
|
||||
.long TC0_IRQHandler
|
||||
.long TC1_IRQHandler
|
||||
.long PWM_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long DMAC0_IRQHandler
|
||||
.long DMAC1_IRQHandler
|
||||
.long 0
|
||||
.long UDPHS_IRQHandler
|
||||
.long GMAC_IRQHandler
|
||||
.long EMAC_IRQHandler
|
||||
.long 0
|
||||
.long ISI_IRQHandler
|
||||
.long SSC0_IRQHandler
|
||||
.long SSC1_IRQHandler
|
||||
.long CAN0_IRQHandler
|
||||
.long CAN1_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long TRNG_IRQHandler
|
||||
.long 0
|
||||
.long IRQ_IRQHandler
|
||||
.long FUSE_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ FIQ_IRQHandler
|
||||
IRQ PMC_IRQHandler
|
||||
IRQ DBGU_IRQHandler
|
||||
IRQ PIOA_IRQHandler
|
||||
IRQ PIOB_IRQHandler
|
||||
IRQ PIOC_IRQHandler
|
||||
IRQ PIOD_IRQHandler
|
||||
IRQ PIOE_IRQHandler
|
||||
IRQ SMD_IRQHandler
|
||||
IRQ USART0_IRQHandler
|
||||
IRQ USART1_IRQHandler
|
||||
IRQ USART2_IRQHandler
|
||||
IRQ USART3_IRQHandler
|
||||
IRQ UART0_IRQHandler
|
||||
IRQ UART1_IRQHandler
|
||||
IRQ TWI0_IRQHandler
|
||||
IRQ TWI1_IRQHandler
|
||||
IRQ TWI2_IRQHandler
|
||||
IRQ HSMCI0_IRQHandler
|
||||
IRQ HSMCI1_IRQHandler
|
||||
IRQ HSMCI2_IRQHandler
|
||||
IRQ SPI0_IRQHandler
|
||||
IRQ SPI1_IRQHandler
|
||||
IRQ TC0_IRQHandler
|
||||
IRQ TC1_IRQHandler
|
||||
IRQ PWM_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ DMAC0_IRQHandler
|
||||
IRQ DMAC1_IRQHandler
|
||||
IRQ UDPHS_IRQHandler
|
||||
IRQ GMAC_IRQHandler
|
||||
IRQ EMAC_IRQHandler
|
||||
IRQ ISI_IRQHandler
|
||||
IRQ SSC0_IRQHandler
|
||||
IRQ SSC1_IRQHandler
|
||||
IRQ CAN0_IRQHandler
|
||||
IRQ CAN1_IRQHandler
|
||||
IRQ TRNG_IRQHandler
|
||||
IRQ IRQ_IRQHandler
|
||||
IRQ FUSE_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e15a.s
Normal file
132
targets/device/sam/atsamd21e15a.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E15A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E15A device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e15b.s
Normal file
132
targets/device/sam/atsamd21e15b.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E15B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E15B device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e15bu.s
Normal file
132
targets/device/sam/atsamd21e15bu.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E15BU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E15BU device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 35-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e15cu.s
Normal file
132
targets/device/sam/atsamd21e15cu.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E15CU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E15CU device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 35-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e15l.s
Normal file
132
targets/device/sam/atsamd21e15l.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E15L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E15L device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, QFN32_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e16a.s
Normal file
132
targets/device/sam/atsamd21e16a.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E16A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E16A device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e16b.s
Normal file
132
targets/device/sam/atsamd21e16b.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E16B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E16B device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e16bu.s
Normal file
132
targets/device/sam/atsamd21e16bu.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E16BU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E16BU device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 35-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e16cu.s
Normal file
132
targets/device/sam/atsamd21e16cu.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E16CU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E16CU device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 35-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e16l.s
Normal file
132
targets/device/sam/atsamd21e16l.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E16L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E16L device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, QFN32_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e17a.s
Normal file
132
targets/device/sam/atsamd21e17a.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E17A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E17A device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
135
targets/device/sam/atsamd21e17d.s
Normal file
135
targets/device/sam/atsamd21e17d.s
Normal file
@@ -0,0 +1,135 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E17D.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E17D device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
.long 0
|
||||
.long TCC3_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
IRQ TCC3_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
135
targets/device/sam/atsamd21e17du.s
Normal file
135
targets/device/sam/atsamd21e17du.s
Normal file
@@ -0,0 +1,135 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E17DU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E17DU device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 35-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
.long 0
|
||||
.long TCC3_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
IRQ TCC3_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21e17l.s
Normal file
134
targets/device/sam/atsamd21e17l.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E17L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E17L device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, QFN32_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
.long TCC3_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
IRQ TCC3_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
132
targets/device/sam/atsamd21e18a.s
Normal file
132
targets/device/sam/atsamd21e18a.s
Normal file
@@ -0,0 +1,132 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21E18A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21E18A device: Cortex-M0+ Microcontroller with 256KB Flash, 32KB SRAM, 32-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g15a.s
Normal file
134
targets/device/sam/atsamd21g15a.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G15A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G15A device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g15b.s
Normal file
134
targets/device/sam/atsamd21g15b.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G15B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G15B device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
136
targets/device/sam/atsamd21g15l.s
Normal file
136
targets/device/sam/atsamd21g15l.s
Normal file
@@ -0,0 +1,136 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G15L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G15L device: Cortex-M0+ Microcontroller with 32KB Flash, 4KB SRAM, QFN48_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g16a.s
Normal file
134
targets/device/sam/atsamd21g16a.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G16A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G16A device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g16b.s
Normal file
134
targets/device/sam/atsamd21g16b.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G16B.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G16B device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
136
targets/device/sam/atsamd21g16l.s
Normal file
136
targets/device/sam/atsamd21g16l.s
Normal file
@@ -0,0 +1,136 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G16L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G16L device: Cortex-M0+ Microcontroller with 64KB Flash, 8KB SRAM, QFN48_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g17a.s
Normal file
134
targets/device/sam/atsamd21g17a.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G17A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G17A device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
136
targets/device/sam/atsamd21g17au.s
Normal file
136
targets/device/sam/atsamd21g17au.s
Normal file
@@ -0,0 +1,136 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G17AU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G17AU device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 45-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
137
targets/device/sam/atsamd21g17d.s
Normal file
137
targets/device/sam/atsamd21g17d.s
Normal file
@@ -0,0 +1,137 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G17D.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G17D device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
.long 0
|
||||
.long TCC3_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
IRQ TCC3_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
138
targets/device/sam/atsamd21g17l.s
Normal file
138
targets/device/sam/atsamd21g17l.s
Normal file
@@ -0,0 +1,138 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G17L.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G17L device: Cortex-M0+ Microcontroller with 128KB Flash, 16KB SRAM, QFN48_LIGHTING-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long 0
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long AC1_IRQHandler
|
||||
.long TCC3_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ AC1_IRQHandler
|
||||
IRQ TCC3_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
134
targets/device/sam/atsamd21g18a.s
Normal file
134
targets/device/sam/atsamd21g18a.s
Normal file
@@ -0,0 +1,134 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G18A.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G18A device: Cortex-M0+ Microcontroller with 256KB Flash, 32KB SRAM, 48-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long 0
|
||||
.long 0
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
136
targets/device/sam/atsamd21g18au.s
Normal file
136
targets/device/sam/atsamd21g18au.s
Normal file
@@ -0,0 +1,136 @@
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.go from ATSAMD21G18AU.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
|
||||
|
||||
/*
|
||||
// Microchip ATSAMD21G18AU device: Cortex-M0+ Microcontroller with 256KB Flash, 32KB SRAM, 45-pin package
|
||||
*/
|
||||
|
||||
// Copyright (c) 2018 Microchip Technology Inc.
|
||||
//
|
||||
// SPDX-License-Identifier: Apache-2.0
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
.size Default_Handler, .-Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \handler
|
||||
.set \handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
__isr_vector:
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
.long PM_IRQHandler
|
||||
.long SYSCTRL_IRQHandler
|
||||
.long WDT_IRQHandler
|
||||
.long RTC_IRQHandler
|
||||
.long EIC_IRQHandler
|
||||
.long NVMCTRL_IRQHandler
|
||||
.long DMAC_IRQHandler
|
||||
.long USB_IRQHandler
|
||||
.long EVSYS_IRQHandler
|
||||
.long SERCOM0_IRQHandler
|
||||
.long SERCOM1_IRQHandler
|
||||
.long SERCOM2_IRQHandler
|
||||
.long SERCOM3_IRQHandler
|
||||
.long SERCOM4_IRQHandler
|
||||
.long SERCOM5_IRQHandler
|
||||
.long TCC0_IRQHandler
|
||||
.long TCC1_IRQHandler
|
||||
.long TCC2_IRQHandler
|
||||
.long TC3_IRQHandler
|
||||
.long TC4_IRQHandler
|
||||
.long TC5_IRQHandler
|
||||
.long TC6_IRQHandler
|
||||
.long TC7_IRQHandler
|
||||
.long ADC_IRQHandler
|
||||
.long AC_IRQHandler
|
||||
.long DAC_IRQHandler
|
||||
.long 0
|
||||
.long I2S_IRQHandler
|
||||
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
IRQ PM_IRQHandler
|
||||
IRQ SYSCTRL_IRQHandler
|
||||
IRQ WDT_IRQHandler
|
||||
IRQ RTC_IRQHandler
|
||||
IRQ EIC_IRQHandler
|
||||
IRQ NVMCTRL_IRQHandler
|
||||
IRQ DMAC_IRQHandler
|
||||
IRQ USB_IRQHandler
|
||||
IRQ EVSYS_IRQHandler
|
||||
IRQ SERCOM0_IRQHandler
|
||||
IRQ SERCOM1_IRQHandler
|
||||
IRQ SERCOM2_IRQHandler
|
||||
IRQ SERCOM3_IRQHandler
|
||||
IRQ SERCOM4_IRQHandler
|
||||
IRQ SERCOM5_IRQHandler
|
||||
IRQ TCC0_IRQHandler
|
||||
IRQ TCC1_IRQHandler
|
||||
IRQ TCC2_IRQHandler
|
||||
IRQ TC3_IRQHandler
|
||||
IRQ TC4_IRQHandler
|
||||
IRQ TC5_IRQHandler
|
||||
IRQ TC6_IRQHandler
|
||||
IRQ TC7_IRQHandler
|
||||
IRQ ADC_IRQHandler
|
||||
IRQ AC_IRQHandler
|
||||
IRQ DAC_IRQHandler
|
||||
IRQ I2S_IRQHandler
|
||||
|
||||
.size __isr_vector, .-__isr_vector
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user