// Automatically generated file. DO NOT EDIT. // Generated by gen-device-svd.go from nrf52.svd, see https://github.com/NordicSemiconductor/nrfx/tree/master/mdk /* // nRF52832 reference description for radio MCU with ARM 32-bit Cortex-M4 Microcontroller */ // Copyright (c) 2010 - 2020, Nordic Semiconductor ASA All rights reserved. // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are met: // // 1. Redistributions of source code must retain the above copyright notice, this // list of conditions and the following disclaimer. // // 2. Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the distribution. // // 3. Neither the name of Nordic Semiconductor ASA nor the names of its // contributors may be used to endorse or promote products derived from this // software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE // IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE // ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE // POSSIBILITY OF SUCH DAMAGE. .syntax unified // This is the default handler for interrupts, if triggered but not defined. .section .text.Default_Handler .global Default_Handler .type Default_Handler, %function Default_Handler: wfe b Default_Handler .size Default_Handler, .-Default_Handler // Avoid the need for repeated .weak and .set instructions. .macro IRQ handler .weak \handler .set \handler, Default_Handler .endm // Must set the "a" flag on the section: // https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049 // https://sourceware.org/binutils/docs/as/Section.html#ELF-Version .section .isr_vector, "a", %progbits .global __isr_vector __isr_vector: // Interrupt vector as defined by Cortex-M, starting with the stack top. // On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading // _stack_top and Reset_Handler. .long _stack_top .long Reset_Handler .long NMI_Handler .long HardFault_Handler .long MemoryManagement_Handler .long BusFault_Handler .long UsageFault_Handler .long 0 .long 0 .long 0 .long 0 .long SVC_Handler .long DebugMon_Handler .long 0 .long PendSV_Handler .long SysTick_Handler // Extra interrupts for peripherals defined by the hardware vendor. .long POWER_CLOCK_IRQHandler .long RADIO_IRQHandler .long UARTE0_UART0_IRQHandler .long SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler .long SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler .long NFCT_IRQHandler .long GPIOTE_IRQHandler .long SAADC_IRQHandler .long TIMER0_IRQHandler .long TIMER1_IRQHandler .long TIMER2_IRQHandler .long RTC0_IRQHandler .long TEMP_IRQHandler .long RNG_IRQHandler .long ECB_IRQHandler .long CCM_AAR_IRQHandler .long WDT_IRQHandler .long RTC1_IRQHandler .long QDEC_IRQHandler .long COMP_LPCOMP_IRQHandler .long SWI0_EGU0_IRQHandler .long SWI1_EGU1_IRQHandler .long SWI2_EGU2_IRQHandler .long SWI3_EGU3_IRQHandler .long SWI4_EGU4_IRQHandler .long SWI5_EGU5_IRQHandler .long TIMER3_IRQHandler .long TIMER4_IRQHandler .long PWM0_IRQHandler .long PDM_IRQHandler .long 0 .long 0 .long MWU_IRQHandler .long PWM1_IRQHandler .long PWM2_IRQHandler .long SPIM2_SPIS2_SPI2_IRQHandler .long RTC2_IRQHandler .long I2S_IRQHandler .long FPU_IRQHandler // Define default implementations for interrupts, redirecting to // Default_Handler when not implemented. IRQ NMI_Handler IRQ HardFault_Handler IRQ MemoryManagement_Handler IRQ BusFault_Handler IRQ UsageFault_Handler IRQ SVC_Handler IRQ DebugMon_Handler IRQ PendSV_Handler IRQ SysTick_Handler IRQ POWER_CLOCK_IRQHandler IRQ POWER_IRQHandler IRQ CLOCK_IRQHandler IRQ RADIO_IRQHandler IRQ UARTE0_UART0_IRQHandler IRQ UARTE0_IRQHandler IRQ UART0_IRQHandler IRQ SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler IRQ SPIM0_IRQHandler IRQ SPIS0_IRQHandler IRQ TWIM0_IRQHandler IRQ TWIS0_IRQHandler IRQ SPI0_IRQHandler IRQ TWI0_IRQHandler IRQ SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler IRQ SPIM1_IRQHandler IRQ SPIS1_IRQHandler IRQ TWIM1_IRQHandler IRQ TWIS1_IRQHandler IRQ SPI1_IRQHandler IRQ TWI1_IRQHandler IRQ NFCT_IRQHandler IRQ GPIOTE_IRQHandler IRQ SAADC_IRQHandler IRQ TIMER0_IRQHandler IRQ TIMER1_IRQHandler IRQ TIMER2_IRQHandler IRQ RTC0_IRQHandler IRQ TEMP_IRQHandler IRQ RNG_IRQHandler IRQ ECB_IRQHandler IRQ CCM_AAR_IRQHandler IRQ CCM_IRQHandler IRQ AAR_IRQHandler IRQ WDT_IRQHandler IRQ RTC1_IRQHandler IRQ QDEC_IRQHandler IRQ COMP_LPCOMP_IRQHandler IRQ COMP_IRQHandler IRQ LPCOMP_IRQHandler IRQ SWI0_EGU0_IRQHandler IRQ SWI0_IRQHandler IRQ EGU0_IRQHandler IRQ SWI1_EGU1_IRQHandler IRQ SWI1_IRQHandler IRQ EGU1_IRQHandler IRQ SWI2_EGU2_IRQHandler IRQ SWI2_IRQHandler IRQ EGU2_IRQHandler IRQ SWI3_EGU3_IRQHandler IRQ SWI3_IRQHandler IRQ EGU3_IRQHandler IRQ SWI4_EGU4_IRQHandler IRQ SWI4_IRQHandler IRQ EGU4_IRQHandler IRQ SWI5_EGU5_IRQHandler IRQ SWI5_IRQHandler IRQ EGU5_IRQHandler IRQ TIMER3_IRQHandler IRQ TIMER4_IRQHandler IRQ PWM0_IRQHandler IRQ PDM_IRQHandler IRQ MWU_IRQHandler IRQ PWM1_IRQHandler IRQ PWM2_IRQHandler IRQ SPIM2_SPIS2_SPI2_IRQHandler IRQ SPIM2_IRQHandler IRQ SPIS2_IRQHandler IRQ SPI2_IRQHandler IRQ RTC2_IRQHandler IRQ I2S_IRQHandler IRQ FPU_IRQHandler .size __isr_vector, .-__isr_vector