173 lines
4.8 KiB
ArmAsm
173 lines
4.8 KiB
ArmAsm
; Automatically generated file. DO NOT EDIT.
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; Generated by gen-device-avr.go from ATmega128RFR2.atdf, see http://packs.download.atmel.com/
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; This is the default handler for interrupts, if triggered but not defined.
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; Sleep inside so that an accidentally triggered interrupt won't drain the
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; battery of a battery-powered device.
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.section .text.__vector_default
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.global __vector_default
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__vector_default:
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sleep
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rjmp __vector_default
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; Avoid the need for repeated .weak and .set instructions.
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.macro IRQ handler
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.weak \handler
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.set \handler, __vector_default
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.endm
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; The interrupt vector of this device. Must be placed at address 0 by the linker.
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.section .vectors, "a", %progbits
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.global __vectors
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jmp __vector_RESET
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jmp __vector_INT0
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jmp __vector_INT1
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jmp __vector_INT2
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jmp __vector_INT3
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jmp __vector_INT4
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jmp __vector_INT5
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jmp __vector_INT6
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jmp __vector_INT7
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jmp __vector_PCINT0
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jmp __vector_PCINT1
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jmp __vector_PCINT2
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jmp __vector_WDT
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jmp __vector_TIMER2_COMPA
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jmp __vector_TIMER2_COMPB
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jmp __vector_TIMER2_OVF
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jmp __vector_TIMER1_CAPT
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jmp __vector_TIMER1_COMPA
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jmp __vector_TIMER1_COMPB
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jmp __vector_TIMER1_COMPC
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jmp __vector_TIMER1_OVF
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jmp __vector_TIMER0_COMPA
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jmp __vector_TIMER0_COMPB
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jmp __vector_TIMER0_OVF
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jmp __vector_SPI_STC
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jmp __vector_USART0_RX
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jmp __vector_USART0_UDRE
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jmp __vector_USART0_TX
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jmp __vector_ANALOG_COMP
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jmp __vector_ADC
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jmp __vector_EE_READY
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jmp __vector_TIMER3_CAPT
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jmp __vector_TIMER3_COMPA
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jmp __vector_TIMER3_COMPB
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jmp __vector_TIMER3_COMPC
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jmp __vector_TIMER3_OVF
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jmp __vector_USART1_RX
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jmp __vector_USART1_UDRE
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jmp __vector_USART1_TX
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jmp __vector_TWI
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jmp __vector_SPM_READY
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jmp __vector_TIMER4_CAPT
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jmp __vector_TIMER4_COMPA
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jmp __vector_TIMER4_COMPB
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jmp __vector_TIMER4_COMPC
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jmp __vector_TIMER4_OVF
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jmp __vector_TIMER5_CAPT
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jmp __vector_TIMER5_COMPA
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jmp __vector_TIMER5_COMPB
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jmp __vector_TIMER5_COMPC
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jmp __vector_TIMER5_OVF
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jmp __vector_default
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jmp __vector_default
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jmp __vector_default
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jmp __vector_default
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jmp __vector_default
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jmp __vector_default
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jmp __vector_TRX24_PLL_LOCK
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jmp __vector_TRX24_PLL_UNLOCK
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jmp __vector_TRX24_RX_START
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jmp __vector_TRX24_RX_END
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jmp __vector_TRX24_CCA_ED_DONE
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jmp __vector_TRX24_XAH_AMI
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jmp __vector_TRX24_TX_END
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jmp __vector_TRX24_AWAKE
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jmp __vector_SCNT_CMP1
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jmp __vector_SCNT_CMP2
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jmp __vector_SCNT_CMP3
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jmp __vector_SCNT_OVFL
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jmp __vector_SCNT_BACKOFF
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jmp __vector_AES_READY
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jmp __vector_BAT_LOW
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jmp __vector_TRX24_TX_START
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jmp __vector_TRX24_AMI0
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jmp __vector_TRX24_AMI1
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jmp __vector_TRX24_AMI2
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jmp __vector_TRX24_AMI3
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; Define default implementations for interrupts, redirecting to
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; __vector_default when not implemented.
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IRQ __vector_RESET
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IRQ __vector_INT0
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IRQ __vector_INT1
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IRQ __vector_INT2
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IRQ __vector_INT3
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IRQ __vector_INT4
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IRQ __vector_INT5
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IRQ __vector_INT6
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IRQ __vector_INT7
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IRQ __vector_PCINT0
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IRQ __vector_PCINT1
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IRQ __vector_PCINT2
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IRQ __vector_WDT
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IRQ __vector_TIMER2_COMPA
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IRQ __vector_TIMER2_COMPB
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IRQ __vector_TIMER2_OVF
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IRQ __vector_TIMER1_CAPT
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IRQ __vector_TIMER1_COMPA
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IRQ __vector_TIMER1_COMPB
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IRQ __vector_TIMER1_COMPC
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IRQ __vector_TIMER1_OVF
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IRQ __vector_TIMER0_COMPA
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IRQ __vector_TIMER0_COMPB
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IRQ __vector_TIMER0_OVF
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IRQ __vector_SPI_STC
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IRQ __vector_USART0_RX
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IRQ __vector_USART0_UDRE
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IRQ __vector_USART0_TX
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IRQ __vector_ANALOG_COMP
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IRQ __vector_ADC
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IRQ __vector_EE_READY
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IRQ __vector_TIMER3_CAPT
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IRQ __vector_TIMER3_COMPA
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IRQ __vector_TIMER3_COMPB
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IRQ __vector_TIMER3_COMPC
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IRQ __vector_TIMER3_OVF
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IRQ __vector_USART1_RX
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IRQ __vector_USART1_UDRE
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IRQ __vector_USART1_TX
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IRQ __vector_TWI
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IRQ __vector_SPM_READY
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IRQ __vector_TIMER4_CAPT
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IRQ __vector_TIMER4_COMPA
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IRQ __vector_TIMER4_COMPB
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IRQ __vector_TIMER4_COMPC
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IRQ __vector_TIMER4_OVF
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IRQ __vector_TIMER5_CAPT
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IRQ __vector_TIMER5_COMPA
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IRQ __vector_TIMER5_COMPB
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IRQ __vector_TIMER5_COMPC
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IRQ __vector_TIMER5_OVF
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IRQ __vector_TRX24_PLL_LOCK
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IRQ __vector_TRX24_PLL_UNLOCK
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IRQ __vector_TRX24_RX_START
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IRQ __vector_TRX24_RX_END
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IRQ __vector_TRX24_CCA_ED_DONE
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IRQ __vector_TRX24_XAH_AMI
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IRQ __vector_TRX24_TX_END
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IRQ __vector_TRX24_AWAKE
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IRQ __vector_SCNT_CMP1
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IRQ __vector_SCNT_CMP2
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IRQ __vector_SCNT_CMP3
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IRQ __vector_SCNT_OVFL
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IRQ __vector_SCNT_BACKOFF
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IRQ __vector_AES_READY
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IRQ __vector_BAT_LOW
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IRQ __vector_TRX24_TX_START
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IRQ __vector_TRX24_AMI0
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IRQ __vector_TRX24_AMI1
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IRQ __vector_TRX24_AMI2
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IRQ __vector_TRX24_AMI3
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