184 lines
6.2 KiB
ArmAsm
184 lines
6.2 KiB
ArmAsm
// Automatically generated file. DO NOT EDIT.
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// Generated by gen-device-svd.go from rp2350.svd, see https://github.com/posborne/cmsis-svd/tree/master/data/RaspberryPi
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/*
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//
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// Dual Cortex-M33 or Hazard3 processors at 150MHz
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// 520kB on-chip SRAM, in 10 independent banks
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// Extended low-power sleep states with optional SRAM retention: as low as 10uA DVDD
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// 8kB of one-time-programmable storage (OTP)
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// Up to 16MB of external QSPI flash/PSRAM via dedicated QSPI bus
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// Additional 16MB flash/PSRAM accessible via optional second chip-select
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// On-chip switched-mode power supply to generate core voltage
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// Low-quiescent-current LDO mode can be enabled for sleep states
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// 2x on-chip PLLs for internal or external clock generation
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// GPIOs are 5V-tolerant (powered), and 3.3V-failsafe (unpowered)
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// Security features:
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// Optional boot signing, enforced by on-chip mask ROM, with key fingerprint in OTP
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// Protected OTP storage for optional boot decryption key
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// Global bus filtering based on Arm or RISC-V security/privilege levels
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// Peripherals, GPIOs and DMA channels individually assignable to security domains
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// Hardware mitigations for fault injection attacks
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// Hardware SHA-256 accelerator
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// Peripherals:
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// 2x UARTs
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// 2x SPI controllers
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// 2x I2C controllers
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// 24x PWM channels
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// USB 1.1 controller and PHY, with host and device support
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// 12x PIO state machines
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// 1x HSTX peripheral
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//
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*/
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// Copyright (c) 2024 Raspberry Pi Ltd. SPDX-License-Identifier: BSD-3-Clause
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.syntax unified
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// This is the default handler for interrupts, if triggered but not defined.
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.section .text.Default_Handler
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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wfe
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b Default_Handler
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.size Default_Handler, .-Default_Handler
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// Avoid the need for repeated .weak and .set instructions.
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.macro IRQ handler
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.weak \handler
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.set \handler, Default_Handler
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.endm
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// Must set the "a" flag on the section:
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// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
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// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
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.section .isr_vector, "a", %progbits
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.global __isr_vector
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__isr_vector:
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// Interrupt vector as defined by Cortex-M, starting with the stack top.
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// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
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// _stack_top and Reset_Handler.
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.long _stack_top
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.long Reset_Handler
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.long NMI_Handler
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.long HardFault_Handler
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.long MemoryManagement_Handler
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.long BusFault_Handler
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.long UsageFault_Handler
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.long 0
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.long 0
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.long 0
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.long 0
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.long SVC_Handler
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.long DebugMon_Handler
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.long 0
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.long PendSV_Handler
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.long SysTick_Handler
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// Extra interrupts for peripherals defined by the hardware vendor.
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.long TIMER0_IRQ_0_IRQHandler
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.long TIMER0_IRQ_1_IRQHandler
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.long TIMER0_IRQ_2_IRQHandler
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.long TIMER0_IRQ_3_IRQHandler
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.long TIMER1_IRQ_0_IRQHandler
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.long TIMER1_IRQ_1_IRQHandler
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.long TIMER1_IRQ_2_IRQHandler
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.long TIMER1_IRQ_3_IRQHandler
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.long PWM_IRQ_WRAP_0_IRQHandler
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.long PWM_IRQ_WRAP_1_IRQHandler
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.long DMA_IRQ_0_IRQHandler
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.long DMA_IRQ_1_IRQHandler
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.long DMA_IRQ_2_IRQHandler
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.long DMA_IRQ_3_IRQHandler
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.long USBCTRL_IRQ_IRQHandler
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.long PIO0_IRQ_0_IRQHandler
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.long PIO0_IRQ_1_IRQHandler
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.long PIO1_IRQ_0_IRQHandler
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.long PIO1_IRQ_1_IRQHandler
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.long PIO2_IRQ_0_IRQHandler
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.long PIO2_IRQ_1_IRQHandler
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.long IO_IRQ_BANK0_IRQHandler
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.long IO_IRQ_BANK0_NS_IRQHandler
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.long IO_IRQ_QSPI_IRQHandler
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.long IO_IRQ_QSPI_NS_IRQHandler
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.long SIO_IRQ_FIFO_IRQHandler
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.long SIO_IRQ_BELL_IRQHandler
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.long SIO_IRQ_FIFO_NS_IRQHandler
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.long SIO_IRQ_BELL_NS_IRQHandler
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.long SIO_IRQ_MTIMECMP_IRQHandler
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.long CLOCKS_IRQ_IRQHandler
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.long SPI0_IRQ_IRQHandler
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.long SPI1_IRQ_IRQHandler
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.long UART0_IRQ_IRQHandler
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.long UART1_IRQ_IRQHandler
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.long ADC_IRQ_FIFO_IRQHandler
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.long I2C0_IRQ_IRQHandler
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.long I2C1_IRQ_IRQHandler
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.long OTP_IRQ_IRQHandler
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.long TRNG_IRQ_IRQHandler
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.long 0
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.long 0
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.long PLL_SYS_IRQ_IRQHandler
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.long PLL_USB_IRQ_IRQHandler
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.long POWMAN_IRQ_POW_IRQHandler
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.long POWMAN_IRQ_TIMER_IRQHandler
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// Define default implementations for interrupts, redirecting to
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// Default_Handler when not implemented.
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IRQ NMI_Handler
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IRQ HardFault_Handler
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IRQ MemoryManagement_Handler
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IRQ BusFault_Handler
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IRQ UsageFault_Handler
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IRQ SVC_Handler
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IRQ DebugMon_Handler
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IRQ PendSV_Handler
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IRQ SysTick_Handler
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IRQ TIMER0_IRQ_0_IRQHandler
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IRQ TIMER0_IRQ_1_IRQHandler
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IRQ TIMER0_IRQ_2_IRQHandler
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IRQ TIMER0_IRQ_3_IRQHandler
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IRQ TIMER1_IRQ_0_IRQHandler
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IRQ TIMER1_IRQ_1_IRQHandler
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IRQ TIMER1_IRQ_2_IRQHandler
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IRQ TIMER1_IRQ_3_IRQHandler
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IRQ PWM_IRQ_WRAP_0_IRQHandler
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IRQ PWM_IRQ_WRAP_1_IRQHandler
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IRQ DMA_IRQ_0_IRQHandler
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IRQ DMA_IRQ_1_IRQHandler
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IRQ DMA_IRQ_2_IRQHandler
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IRQ DMA_IRQ_3_IRQHandler
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IRQ USBCTRL_IRQ_IRQHandler
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IRQ PIO0_IRQ_0_IRQHandler
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IRQ PIO0_IRQ_1_IRQHandler
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IRQ PIO1_IRQ_0_IRQHandler
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IRQ PIO1_IRQ_1_IRQHandler
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IRQ PIO2_IRQ_0_IRQHandler
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IRQ PIO2_IRQ_1_IRQHandler
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IRQ IO_IRQ_BANK0_IRQHandler
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IRQ IO_IRQ_BANK0_NS_IRQHandler
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IRQ IO_IRQ_QSPI_IRQHandler
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IRQ IO_IRQ_QSPI_NS_IRQHandler
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IRQ SIO_IRQ_FIFO_IRQHandler
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IRQ SIO_IRQ_BELL_IRQHandler
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IRQ SIO_IRQ_FIFO_NS_IRQHandler
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IRQ SIO_IRQ_BELL_NS_IRQHandler
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IRQ SIO_IRQ_MTIMECMP_IRQHandler
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IRQ CLOCKS_IRQ_IRQHandler
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IRQ SPI0_IRQ_IRQHandler
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IRQ SPI1_IRQ_IRQHandler
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IRQ UART0_IRQ_IRQHandler
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IRQ UART1_IRQ_IRQHandler
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IRQ ADC_IRQ_FIFO_IRQHandler
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IRQ I2C0_IRQ_IRQHandler
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IRQ I2C1_IRQ_IRQHandler
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IRQ OTP_IRQ_IRQHandler
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IRQ TRNG_IRQ_IRQHandler
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IRQ PLL_SYS_IRQ_IRQHandler
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IRQ PLL_USB_IRQ_IRQHandler
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IRQ POWMAN_IRQ_POW_IRQHandler
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IRQ POWMAN_IRQ_TIMER_IRQHandler
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.size __isr_vector, .-__isr_vector
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