Files
llgo/internal/cabi/_testdata/arch/esp32c3/basic.ll
2025-09-14 20:50:13 +08:00

74 lines
3.7 KiB
LLVM

; ModuleID = '../../wrap/basic.c'
source_filename = "../../wrap/basic.c"
target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
target triple = "riscv32-esp-unknown-elf"
; Function Attrs: noinline nounwind optnone
define dso_local zeroext i8 @basic_int8(i8 noundef zeroext %0) #0 {
%2 = alloca i8, align 1
store i8 %0, ptr %2, align 1
%3 = load i8, ptr %2, align 1
ret i8 %3
}
; Function Attrs: noinline nounwind optnone
define dso_local signext i16 @basic_int16(i16 noundef signext %0) #0 {
%2 = alloca i16, align 2
store i16 %0, ptr %2, align 2
%3 = load i16, ptr %2, align 2
ret i16 %3
}
; Function Attrs: noinline nounwind optnone
define dso_local i32 @basic_int32(i32 noundef %0) #0 {
%2 = alloca i32, align 4
store i32 %0, ptr %2, align 4
%3 = load i32, ptr %2, align 4
ret i32 %3
}
; Function Attrs: noinline nounwind optnone
define dso_local i64 @basic_int64(i64 noundef %0) #0 {
%2 = alloca i64, align 8
store i64 %0, ptr %2, align 8
%3 = load i64, ptr %2, align 8
ret i64 %3
}
; Function Attrs: noinline nounwind optnone
define dso_local float @basic_float32(float noundef %0) #0 {
%2 = alloca float, align 4
store float %0, ptr %2, align 4
%3 = load float, ptr %2, align 4
ret float %3
}
; Function Attrs: noinline nounwind optnone
define dso_local double @basic_float64(double noundef %0) #0 {
%2 = alloca double, align 8
store double %0, ptr %2, align 8
%3 = load double, ptr %2, align 8
ret double %3
}
; Function Attrs: noinline nounwind optnone
define dso_local ptr @basic_uintptr(ptr noundef %0) #0 {
%2 = alloca ptr, align 4
store ptr %0, ptr %2, align 4
%3 = load ptr, ptr %2, align 4
ret ptr %3
}
attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic-rv32" "target-features"="+32bit,+a,+c,+m,+relax,+zmmul,-b,-d,-e,-experimental-smmpm,-experimental-smnpm,-experimental-ssnpm,-experimental-sspm,-experimental-ssqosid,-experimental-supm,-experimental-zacas,-experimental-zalasr,-experimental-zicfilp,-experimental-zicfiss,-f,-h,-shcounterenw,-shgatpa,-shtvala,-shvsatpa,-shvstvala,-shvstvecd,-smaia,-smcdeleg,-smcsrind,-smepmp,-smstateen,-ssaia,-ssccfg,-ssccptr,-sscofpmf,-sscounterenw,-sscsrind,-ssstateen,-ssstrict,-sstc,-sstvala,-sstvecd,-ssu64xl,-svade,-svadu,-svbare,-svinval,-svnapot,-svpbmt,-v,-xcvalu,-xcvbi,-xcvbitmanip,-xcvelw,-xcvmac,-xcvmem,-xcvsimd,-xesppie,-xsfcease,-xsfvcp,-xsfvfnrclipxfqf,-xsfvfwmaccqqq,-xsfvqmaccdod,-xsfvqmaccqoq,-xsifivecdiscarddlone,-xsifivecflushdlone,-xtheadba,-xtheadbb,-xtheadbs,-xtheadcmo,-xtheadcondmov,-xtheadfmemidx,-xtheadmac,-xtheadmemidx,-xtheadmempair,-xtheadsync,-xtheadvdot,-xventanacondops,-xwchc,-za128rs,-za64rs,-zaamo,-zabha,-zalrsc,-zama16b,-zawrs,-zba,-zbb,-zbc,-zbkb,-zbkc,-zbkx,-zbs,-zca,-zcb,-zcd,-zce,-zcf,-zcmop,-zcmp,-zcmt,-zdinx,-zfa,-zfbfmin,-zfh,-zfhmin,-zfinx,-zhinx,-zhinxmin,-zic64b,-zicbom,-zicbop,-zicboz,-ziccamoa,-ziccif,-zicclsm,-ziccrse,-zicntr,-zicond,-zicsr,-zifencei,-zihintntl,-zihintpause,-zihpm,-zimop,-zk,-zkn,-zknd,-zkne,-zknh,-zkr,-zks,-zksed,-zksh,-zkt,-ztso,-zvbb,-zvbc,-zve32f,-zve32x,-zve64d,-zve64f,-zve64x,-zvfbfmin,-zvfbfwma,-zvfh,-zvfhmin,-zvkb,-zvkg,-zvkn,-zvknc,-zvkned,-zvkng,-zvknha,-zvknhb,-zvks,-zvksc,-zvksed,-zvksg,-zvksh,-zvkt,-zvl1024b,-zvl128b,-zvl16384b,-zvl2048b,-zvl256b,-zvl32768b,-zvl32b,-zvl4096b,-zvl512b,-zvl64b,-zvl65536b,-zvl8192b" }
!llvm.module.flags = !{!0, !1, !2, !4, !5}
!llvm.ident = !{!6}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 1, !"target-abi", !"ilp32"}
!2 = !{i32 6, !"riscv-isa", !3}
!3 = !{!"rv32i2p1_m2p0_a2p1_c2p0_zmmul1p0"}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{i32 8, !"SmallDataLimit", i32 8}
!6 = !{!"clang version 19.1.2 (https://github.com/espressif/llvm-project 510a078c1ad4aee4460818bcb38ff0ba3fbf6a83)"}