23 lines
473 B
Plaintext
23 lines
473 B
Plaintext
# Memory layout obtained from IDF linker files.
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SRAM_START_ADDRESS = 0x40800000;
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SRAM_LEN = 0x60000;
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CPU_FREQUENCY = 40000000;
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UART0_BAUD = 115200;
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UART0_CLKDIV_REG = 0x60000014;
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UART0_CLKDIV_VAL = CPU_FREQUENCY / UART0_BAUD;
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UART0_STATUS = 0x6000001C;
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UART0_TX_ADDR = 0x60000000;
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MEMORY
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{
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sram_seg (RWX) : org = SRAM_START_ADDRESS, len = SRAM_LEN
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}
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REGION_ALIAS("iram_seg", sram_seg);
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REGION_ALIAS("dram_seg", sram_seg);
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INCLUDE "targets/esp32-riscv.app.elf.ld";
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