b80a54eb0f
Add comprehensive target configuration parsing and inheritance system: - Create internal/targets package with config structures - Support JSON configuration loading with inheritance resolution - Implement multi-level inheritance (e.g., rp2040 → cortex-m0plus → cortex-m) - Add 206 target configurations from TinyGo for embedded platforms - Support core fields: name, llvm-target, cpu, features, build-tags, goos, goarch, cflags, ldflags - Provide high-level resolver interface for target lookup - Include comprehensive unit tests with 100% target parsing coverage This foundation enables future -target parameter support for cross-compilation to diverse embedded platforms beyond current GOOS/GOARCH limitations. 🤖 Generated with [Claude Code](https://claude.ai/code) Co-Authored-By: Claude <noreply@anthropic.com>
44 lines
1.2 KiB
ArmAsm
44 lines
1.2 KiB
ArmAsm
#define __tmp_reg__ r16
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#define __zero_reg__ r17
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; Startup code
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.section .text.__vector_RESET
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.global __vector_RESET
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__vector_RESET:
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clr __zero_reg__ ; this register is expected to be 0 by the C calling convention
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; Keep the stack pointer at the default location, which is RAMEND.
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; Initialize .data section.
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.section .text.__do_copy_data,"ax",@progbits
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.global __do_copy_data
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__do_copy_data:
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ldi xl, lo8(__data_start)
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ldi xh, hi8(__data_start)
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ldi yl, lo8(__data_end)
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ldi yh, hi8(__data_end)
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ldi zl, lo8(__data_load_start)
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ldi zh, hi8(__data_load_start)
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1: ; loop
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cp xl, yl ; if x == y
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cpc xh, yh
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breq 2f ; goto end
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ld r16, Z+ ; r0 = *(z++)
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st X+, r16 ; *(x++) = r0
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rjmp 1b ; goto loop
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2: ; end
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; Initialize .bss section.
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.section .text.__do_clear_bss,"ax",@progbits
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.global __do_clear_bss
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__do_clear_bss:
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ldi xl, lo8(__bss_start)
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ldi xh, hi8(__bss_start)
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ldi yl, lo8(__bss_end)
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1: ; loop
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cp xl, yl ; if x == y
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breq 2f ; goto end
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st X+, __zero_reg__ ; *(x++) = 0
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rjmp 1b ; goto loop
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2: ; end
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